The invention relates to a thin film capacitor which comprises a carrier substrate, at least two interdigitated electrodes, and at least one dielectric.
Dielectric materials with high dielectric constant values (εr>50) are used for achieving high capacitance values in capacitors of small dimensions. Dielectrics with εr>50 at dielectric thicknesses of 50 nm to 2 μm are made by means of thin film processes in the manufacture of of thin film capacitors. An inexpensive method which is used for depositing thin layers with εr>50 is a wet chemical thin film method such as, for example, the sol-gel method. The lower electrode in a thin film capacitor is made of a non-noble metal such as, for example, aluminum or copper, or a noble metal, for example silver, a silver alloy, or platinum. For the upper electrode, noble metals such as, for example, platinum, silver, silver alloys, or NiCr/gold are used, as for the lower electrode, or alternatively non-noble metals such as, for example, aluminum, nickel, or copper. These are applied by means of thin film processes such as, for example, sputtering or chemical deposition from the gas phase. The electrodes are structured by means of lithographical processes in combination with wet or dry etching steps. Suitable carrier substrate materials are Si wafers, glass or ceramic materials. A protective layer is used for protecting the capacitor construction, for example an organic layer and/or an inorganic layer provided in a printing process or a thin film process. The capacitors are further provided with current supply contacts, either individually or in rows.
This state of the art technology is quite capable of producing inexpensive thin film capacitors which comply with standard specifications. The layer thicknesses of approximately one micrometer, however, do not suffice if higher operating voltages Urated (50 V, 100 V and higher) are to be accommodated in conjunction with increased life requirements for low capacitance values of a few picofarad in high-frequency applications.
A higher breakdown resistance is found in so-called interdigitated capacitors whose electrodes have a finger-like arrangement. The finger shapes of these interdigitated electrodes and their interlocking arrangement together with the superimposed dielectric form the actual capacitor. The capacitance value of such an arrangement is a function of the finger interspacing, the length of the overlaps, the thickness of the dielectric, the dielectric constant values of the substrate and of the dielectric, and the thickness of the electrodes. The finger interspacing in fact determines the breakdown resistance and the resulting admissible operating voltage of the capacitor type.
A capacitor arrangement with interdigitated electrodes is known from publication no. 07283076 A from “Patent Abstracts of Japan”, wherein several interdigitated electrode layers are present one above the other so as to enhance the capacitance value still further. The interdigitated electrodes of a capacitor unit all lie in one plane, and a dielectric is present between every two adjoining electrode levels. A disadvantage of the arrangement of the electrodes in one plane is that the full thickness of the dielectric is not utilized for contributing to the capacitance of the capacitor.